Análise de segurança da arquitetura RISC-V de código aberto

Abstract

This work presents a security analysis applied to the open-source processor CV32E40S, provided by the OpenHWGroup foundation. The study was conducted during a technical internship at the Commissariat de l’Énergie Atomique, focusing on the attacker model and using fault injection as the main technique. For this purpose, the security analysis was conducted using the µArchiFI tool, developed by the hardware security team, to perform a formal analysis of a complete system, encompassing both the hardware and software sides of an embedded system, where components are subjected to fault injections. The CV32E40S processor is a 32-bit RISC-V core with a 4-stage pipeline (IF, ID, EXE, and MB) designed for security applications. It employs a custom extension named Xsecure, which includes security features such as program counter hardening and parity checking during memory accesses. The objective of this analysis is to formalize the countermeasures implemented in the CV32E40S processor. The evaluation considers the software program executed by the processor. To this end, the public FISSC (Fault Injection and Simulation Secure Collection) code suite was used to assess the system’s robustness against fault injections.