Robust OBC: um sistema de computação de bordo tolerante a falhas

Abstract

The use of nanosatellites that utilize the CubeSat standard is currently growing due to their low manufacturing and launch costs compared to traditional satellites. In addition, these types of nanosatellites have a wide variety of applications, ranging from simple to critical applications. For critical applications, it can be necessary that the nanosatellite subsystems have some protection against radiation and its effects (Rad-Hard) because severe failures can make its mission almost impossible to accomplish. Especially the onboard computer (OBC), which is considered the brain of the nanosatellite and needs special attention regarding fault tolerance techniques. RadHard components are the most reliable solution to propose in designing an OBC for critical applications. However, the high cost and limited access to these components make it almost impossible for universities and small companies to research and develop OBCs that use this type of component. With this in mind, this thesis proposes an architecture for a fault-tolerant OBC that uses only COTS components, where the use of the proposed fault tolerance techniques results in an increase in reliability, so as to increase the degree of fault tolerance of an OBC, similar to what occurs when using Rad-Hard components. For this purpose, fault tolerance techniques that could bring reliability to the onboard computer were researched and implemented, such as a processor redundancy switching system, a fault manager that could verify if the faults are permanent or transient, as well as other systems such as SRAM memory protection system and a system that manages the redundancy switching of OBCs. The experimental tests performed on the proposed OBC fault tolerance systems obtained results that addressed the requirements described in this thesis, which were based on three main fundamentals: low electrical power consumption, high computational performance, and high reliability. Additionally, its reliability is compatible with existing OBCs from academic and industrial communities. In this sense, this thesis describes an architecture of a high-reliability OBC, which has differential fault tolerance techniques capable of providing continuity of operation of the onboard computing subsystem even in the presence of failures. In the face of the results, it can be concluded that the objectives of this thesis were achieved because not only a fault-tolerant OBC based on COTS was proposed, but also secondary objectives such as low power consumption, high performance, and reconfigurability of the system were achieved.